A memory, such as a random access memory (RAM) or read only memory (ROM) often includes arrayed memory cells. Typically, each of the memory cells is coupled to at least one bit line and an overlapping word line, and each of the memory cells include a memory element that is configured to store a logic state. In operation, a controller reads from and/or writes to an individual memory element by receiving and transmitting signals over the bit and word lines of the memory.
Flash-based memories employ closely spaced and arrayed core memory cells. Peripheral devices, such as transistors and other devices, communicate voltage/current signals over the bit and word lines of the memory to access individual memory cells. Typically, the access time associated with an individual memory cell is correlative with the length of the signal path required for accessing an individual memory cell. Accordingly, the access times of individual memory cells can be correlative with the spatial distribution of the memory cells in a core cell array.